The invention relates to a basic input output system (BIOS), and more particularly, to systems and methods for BIOS management.
In order to reduce hardware cost, chipset size or the number of pins provided by the chipset is reduced. A south-bridge may connect to a flash read-only memory (ROM) storing BIOS via the industry standard architecture (ISA) interface, low pin count (LPC) interface, or even the serial peripheral interface (SPI), and retrieve the BIOS therefrom. The advantage of the SPI is that it minimizes the number of conductors, pins, and the size of the package of an integrated circuit, resulting in reduced fabrication, assembly and testing costs. Thus, the SPI interface is increasingly being integrated into south-bridge chips provided by many chipset manufacturers.